Digital Equipment Corporation AlphaPC64 Handbücher

Bedienungsanleitungen und Benutzerhandbücher für Motherboards Digital Equipment Corporation AlphaPC64.
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Digital equipment corporation AlphaPC64 Betriebsanweisung (442 Seiten)

Marke: Digital-equipment-corporation | Kategorie: Motherboards | Größe: 1.32 MB |

Englisch

Inhaltsverzeichnis

Digital Alpha VME 4/224 and

1

4/288 Single-Board Computers

1

Contents

3

4 Diagnostics

4

5 System Address Mapping

5

6 Cache and Memory Subsystem

5

7 PCI Host Bridge

6

8 PCI bus

7

10 VME Interface

8

11 System Interrupts

9

12 Console Primer

10

13 Console Commands

10

A Module Connector Pinouts

12

Purpose of this Manual

21

Intended Audience

21

Structure of this Manual

21

Conventions

23

/usr/foo/bar

25

For More Information

28

Product Overview

29

Product Overview 1–3

31

Installation Procedures

35

2–2 Installation Procedures

36

The nn = cable length

39

2.2 Installation

40

Installation Procedures 2–7

41

2–8 Installation Procedures

42

VMEbus Reset

43

Installation Procedures 2–11

45

Size A B C D

47

512 KB Out Out In In

47

2 MB Out Out In In

47

Installation Procedures 2–13

47

Installation Procedures 2–15

49

2–16 Installation Procedures

50

Installation Procedures 2–17

51

2–18 Installation Procedures

52

Installation Procedures 2–19

53

2–20 Installation Procedures

54

Installation Procedures 2–21

55

2–22 Installation Procedures

56

Installation Procedures 2–23

57

2–24 Installation Procedures

58

Installation Procedures 2–25

59

2–26 Installation Procedures

60

2.3 Diagnostics

61

2.4 Troubleshooting

63

Table 2–13 Troubleshooting

65

2.5.2 Hardware Warranty

66

Installation Procedures 2–33

67

2.5.3 Software Maintenance

68

Computer

71

MLO-013262

72

3.2 Console Mode

73

3.3 Environment Variables

73

3.5 Updating Firmware

77

Diagnostics

79

4–2 Diagnostics

80

POST Memory Diagnostic

85

4–8 Diagnostics

86

Heartbeat Timer Test

87

Interval Timer Tests

88

Timer 2 Square Wave Test

89

3 Timers Loopback Test

89

Timer 0 Loopback Test

90

Timer 2 Interrupt Test

91

Timer 1 Interrupt Test

92

4–16 Diagnostics

94

Diagnostics 4–17

95

NVRAM March I Test

96

NVRAM Address-On-Address Test

97

NVRAM March II Test

97

TOY Clock Bitwalk Test

98

Diagnostics 4–21

99

LAN Address ROM Dump

100

Diagnostics 4–23

101

4–24 Diagnostics

102

NCR810 Internal Loopback Test

103

NCR810 Interrupt Test

104

Watchdog Timer Interrupt Test

105

VME Interface Tests

106

VME Scatter-Gather RAM Test

107

4.4 Initialization Sequence

108

Figure 4–4 Console POST Flows

109

Figure 4–5 Console POST Flows

110

System Address Mapping

111

5–2 System Address Mapping

112

0x17FFFFFFF)

114

0x19FFFFFFF)

114

0x1AFFFFFFF)

115

(0x1B0000000 to 0x1BFFFFFFF)

115

System Address Mapping 5–11

121

Byte Offset

122

5–14 System Address Mapping

124

System Address Mapping 5–15

125

System Address Mapping 5–17

127

System Address Mapping 5–19

129

into the

130

to generate the PCI address

130

System Address Mapping 5–21

131

Cache and Memory Subsystem

133

ML013273

134

ML013275

135

6.1 System Bus Interface

136

6.2 Bcache Control

137

6.3 Memory Controller

137

6.3.1 Memory Organization

138

6.3.4 Minimizing Read Latency

139

6.3.5 Transaction Scheduler

139

6.4 Error Handling

140

6.6 Description of CSRs

143

LJ-04179.AI

146

6.6.3 Tag Enable Register

148

6.6.6 LD

151

_L Low Address Register

151

6.6.7 LD

152

_L High Address Register

152

PRES_DET<15:0>

153

PRES_DET<31:16>

153

LJ-04188.AI

154

LJ-04189.AI

154

Field names are for Bank 0

155

Table 6–7 Timing Register A

157

ML013279

158

GTR_MAX_RAS_WIDTH

160

LJ-04194.AI

161

6.7 Data Path

162

6.7.1 Memory Read Buffer

163

6.7.4 DMA Write Buffer

163

6.7.5 Memory Write Buffer

164

6.7.6 Error Handling

164

PCI Host Bridge

165

7–2 PCI Host Bridge

166

7.2 Interface to the PCI bus

167

7.3 Features

168

7.3.3 Data Coherency

169

7.3.4 Interrupts

170

7.3.5 Exclusive Access

170

7.3.6 Bus Parking

170

7.3.7 Retry Timeout

171

7.3.8 PCI Master Timeout

171

7.5 Description of CSRs

173

LJ-04195.AI

174

PCI_ERR<31:0>

178

SYS_ERR<33:5>

178

T_BASE<32:10>

179

PCI_BASE<31:20>

180

PCI_MASK<31:20>

181

Hardcoded to Zero

182

EADDR<4:0>

182

EADDR<7:0>

183

CONF_ADDR<1:0>

183

PMLC<7:0>

184

PCI bus 8–1

187

8–2 PCI bus

188

8.1 Ethernet Controller

189

8–4 PCI bus

190

8.1.3 PCI Cycles

191

8.2 SCSI Controller

192

8.2.2 SCSI ID

193

8.2.3 Programming

193

8–8 PCI bus

194

SCNTL0 R/W SCSI Control 0 00

195

DCD R/W DMA Command 27

196

8.3 PCI I/O Companion Card

197

9.1 Nbus Address Space

199

9–2 Nbus

200

ML013285

201

9.2 Module Registers

202

CPU address: 0x1C0010000

203

Nbus offset: 0x800

203

Figure 9–3

203

Brightness Control

204

Display Character

204

Don't Care

204

31 08 07 06 05 04 03 02 01 00

205

ML013288

205

Identiﬁcation Register

206

Presence Detect Bits 1-8

207

MEM_ID_REG :

208

Table 9–4 Presence Detect

209

9.2.5 Reset Reason Registers

210

0x80A but

211

9.2.6 Heartbeat Register

212

MOD_CNTRL_REG_1 :

213

Reserved

214

BC Configuration

214

9.4 Super I/O Chip

216

0x01F0 - 0x03FF

217

Read/Write

217

Physical

219

0x0060 - 0x0064

219

9.6 TOY Clock

220

0x8000 - 0xFFFF

221

from the

221

ML013293

222

9.7 Interval Timing Registers

223

ML013295

224

9.7.2 Timer Registers

226

9.7.3 Timer Modes

227

9–30 Nbus

228

9.7.4 Interrupts

229

Timer #2 IRQ Enable

230

Timer #0 IRQ Enable

230

Timer #2 Status

230

Timer #0 Status

230

9.8 Watchdog Timer

231

9–34 Nbus

232

Watchdog Enable

233

9.9 Nonvolatile RAM

234

VME Interface

235

10.1 VMEbus Master

236

VME Interface 10–3

237

PCI address

238

VME Interface 10–5

239

10.1.2 Data Transfers

241

31 07 06 05 04 03 00

242

ML013329

242

10.2 VMEbus Slave

243

10.2.1 Decoding Addresses

244

VME Interface 10–11

245

Table 10–4 PCI Address

247

VME_IF_BASE+118 :

247

10.3.1 Arbitrating the VMEbus

252

VMEbus Release Protocol

254

DMA Burst Length

254

10.3.2 System Clock Output

255

10.3.3 Timeout Timers

255

31 07 05 04 02 01 00

256

ML013344

256

ML013345

258

Field Name Description

259

<6:3> 1111

259

VME Interface 10–25

259

10.4 Byte Swapping

260

10.4.2 VIC64 Byte Swapping

261

10–28 VME Interface

262

VME Interface 10–29

263

10.5.3 Conﬁguring the VIC64

266

Table 10–16 VME_IF_BASE +

271

Transfers

274

System Interrupts

275

11–2 System Interrupts

276

System Interrupts 11–3

277

11–4 System Interrupts

278

System Interrupts 11–5

279

System Interrupts 11–7

281

Encoded Priority 1-7

282

System Interrupts 11–9

283

11–10 System Interrupts

284

System Interrupts 11–11

285

ML013458

286

11.2 Module Reset

287

11–14 System Interrupts

288

Console Primer

289

12.1.2 Command Overview

290

12.1.3 Shell Operators

291

12.1.4 Using Flow Control

292

V1.1-0 Jul 1 1996 10:16:59

293

12.3 Getting Help

294

Registers

295

within a device

296

applies to the

296

are used synonymously

296

12.4.1 Accessing Memory

297

12.4.2 Examining Registers

298

Register Meaning

299

Console Primer 12–11

299

12–12 Console Primer

300

12.7.1 Monitoring Status

301

12.8 Creating Scripts

302

Console Primer 12–15

303

12–16 Console Primer

304

Console Primer 12–17

305

Console Commands

309

13.1.3 Radix Control

310

Console Commands 13–3

311

Arguments

312

See Also

313

13–6 Console Commands

314

Console Commands 13–7

315

13–8 Console Commands

316

16.123.16.53

317

13–10 Console Commands

318

Examples

320

>>> date

330

10:29:04 August 3, 1992

330

>>>

330

13–24 Console Commands

332

Console Commands 13–25

333

13–28 Console Commands

336

Console Commands 13–35

343

13–36 Console Commands

344

13–38 Console Commands

346

13–42 Console Commands

350

Description

351

13–44 Console Commands

352

13–46 Console Commands

354

Console Commands 13–47

355

Returns a failure status

358

13–54 Console Commands

362

13–56 Console Commands

364

13–58 Console Commands

366

Console Commands 13–59

367

Test Description

373

Console Commands 13–65

373

13–66 Console Commands

374

Console Commands 13–67

375

Console Commands 13–69

377

ﬁle_name

381

>>> pwrup

384

Runs the power-on script

384

Console Commands 13–79

387

Mini-Console

392

Console Commands 13–85

393

Console Commands 13–87

395

13–90 Console Commands

398

13–92 Console Commands

400

>>> show hwrpb

401

HWRPB is at 2000

401

Console Commands 13–95

403

Console Commands 13–105

413

Module Connector Pinouts

415

Front view mating side

417

A–6 Module Connector Pinouts

420

Module Connector Pinouts A–7

421

MLO-013553

422

MLO-013554

423

Digital equipment corporation AlphaPC64 Bedienungsanleitung (76 Seiten)

Marke: Digital-equipment-corporation | Kategorie: Motherboards | Größe: 0.16 MB |

Englisch

Inhaltsverzeichnis

AlphaPC64 Motherboard

1

User’s Manual

1

Contents

3

4 Functional Elements

4

A Supporting Vendor Products

4

About This Manual

7

Document Conventions

8

AlphaPC64 Introduction

9

21072 Chipset

10

AlphaPC64 Introduction 1–3

11

1.2.3 PAL Control Set

12

1.2.6 PCI Interface Overview

13

1.2.7 ISA Interface Overview

13

1.2.8 Software Support

14

1.2.9 Component Layout

14

1.2.10 System Summary

14

AlphaPC64 Introduction 1–7

15

Table 1–2 AlphaPC64 Summary

16

System Jumpers and Connectors

19

2.1 Conﬁguration Jumpers

20

LJ-04457.AI5

26

Scale = 90%

26

3.1 Hardware Requirements

33

3.2 Software Requirements

34

3.3 Hardware Conﬁguration

34

3.4 Software Conﬁguration

41

Functional Elements

45

4–2 Functional Elements

46

4.1.2 PCI/ISA Arbitration

49

4.2 ISA Devices

50

4.3 dc Power Distribution

51

4.4 Flash ROM (System ROM)

53

4.4.2 Flash ROM Structure

56

Functional Elements 4–13

57

4.4.3 Flash ROM Access

58

5.1 Power Requirements

59

5.3 Physical Board Parameters

60

Supporting Vendor Products

65

A.2 Products Not Included

66

Information

67

Digital equipment corporation AlphaPC64 Betriebsanweisung (196 Seiten)

Marke: Digital-equipment-corporation | Kategorie: Motherboards | Größe: 0.40 MB |

Englisch

Inhaltsverzeichnis

AlphaPC64EvaluationBoard

1

User’sGuide

1

Contents

3

4 System Address Mapping

5

B SROM Initialization

7

C PCI Address Maps

7

Audience

13

Document Content

13

Document Conventions

14

values are in

15

Register Field Notation

16

AlphaPC64 Introduction

19

1.1.1 Memory Subsystem

20

1.1.3 PAL Control Set

20

21072 Chipset

21

1.1.6 PCI Interface Overview

22

1.1.7 ISA Interface Overview

22

1.1.8 Software Support

23

1.2 Evaluation Board Uses

24

AlphaPC64 Introduction 1–7

25

System Jumpers and Connectors

27

LJ-04459.AI5

28

Figure 2–2 J3 Connector

29

Table 2–2

31

Table 2–3

32

LJ-04457.AI5

33

Functional Description

37

3.1.1 21071-CA Introduction

38

Functional Description 3–3

39

3.1.2 21071-DA Introduction

40

Functional Description 3–5

41

3–6 Functional Description

42

3.1.3 21071-BA Introduction

43

3.2.1 sysBus Interface

44

Functional Description 3–9

45

3–10 Functional Description

46

3.2.2 Memory Controller

47

3–12 Functional Description

48

Functional Description 3–13

49

3.3.1 sysBus Interface

50

3.3.2 PCI Interface

50

Functional Description 3–15

51

3–16 Functional Description

52

Functional Description 3–17

53

3–18 Functional Description

54

Functional Description 3–19

55

3.4.1 sysData Bus

56

3.4.2 memData Bus

57

3.4.3 epiData Bus

57

3.4.4 Memory Read Buffer

57

3.4.7 DMA Write Buffer

58

3.4.8 Memory Write Buffer

58

3.4.9 Error Checking

58

3.4.10 epiBus Data Path

58

3.5 Error Handling

59

3.6 Clock Subsystem

60

3–26 Functional Description

62

Functional Description 3–27

63

Clock Signal Name Destination

65

Functional Description 3–29

65

3.7.1 System Interrupts

66

Functional Description 3–31

67

3.7.2 PCI/ISA Arbitration

69

3.8 PCI Devices

70

3.9 ISA Devices

71

3.9.2 Combination Controller

72

3.9.3 Time-of-Year Clock

73

3.10 Serial ROM

74

3.11 dc Power Distribution

75

3–40 Functional Description

76

3.12 Reset and Initialization

77

3.13 System Software

77

3–42 Functional Description

78

3.13.2 Flash ROM Code

79

3.13.3 Operating Systems

79

System Address Mapping

81

Figure 4–1 sysBus Address Map

82

1 BFFF FFFF)

88

System Address Mapping 4–9

89

4–10 System Address Mapping

90

4–14 System Address Mapping

94

System Address Mapping 4–15

95

4–16 System Address Mapping

96

UNPREDICTABLE

97

4–18 System Address Mapping

98

System Address Mapping 4–19

99

System Address Mapping 4–21

101

System Address Mapping 4–23

103

into the

104

to generate the PCI address

104

System Address Mapping 4–25

105

5.1 Power Requirements

107

5.3 Physical Board Parameters

108

LJ-04460.AI5

109

Scale = 90%

109

System Register Descriptions

113

LJ-04179.AI

116

A.1.3 Tag Enable Register

118

ERR_LADR<20:5>

120

A.1.6 LD

121

_L Low Address Register

121

A.1.7 LD

121

_L High Address Register

121

VFP_SUBBANK

122

VFP_ROWADR

122

VFP_COLADR

122

Field Name Type Description

123

PRES_DET<31:16>

124

S0_BASEADR<33:23>

124

S0_COLSEL

126

S0_SUBENA

126

S0_VALID

126

LJ-04190.AI

128

LJ-04191.AI

130

Bank Set Timing Register B

131

Table A–9

131

LJ-04192.AI

132

GTR_MAX_RAS_WIDTH

134

LJ-04194.AI

135

LJ-04195.AI

137

Not applicable

140

SYS_ERR<33:5>

141

PCI_ERR<31:0>

142

T_BASE<32:10>

143

PCI_BASE<31:20>

144

PCI_MASK<31:20>

145

Hardcoded to Zero

146

EADDR<4:0>

146

EADDR<7:0>

147

CONF_ADDR<1:0>

147

PMLC<7:0>

148

PCI_PAGE<31:13>

149

CPU_PAGE<32:13>

150

SROM Initialization

151

B.1.1 Firmware Interface

152

NA = Not applicable

155

Table B–5 CPU Speciﬁcations

156

Read Cycle Calculation

156

SROM Initialization B–7

157

B.1.5 Memory Initialization

158

B.1.6 L2 Cache Initialization

159

B.1.7 Flash ROM (System ROM)

160

Found in image header

163

SROM Initialization B–15

165

B.1.8 Icache Flush Code

166

LJ-04132.AI

167

Jumper in (logical 0)

168

Jumper out (logical 1)

168

PCI Address Maps

171

Address Register

172

Offset Address Register

177

PCI Address Maps C–7

177

Read/Write

178

SIO bridge

180

Physical Address Register

182

C.13 Flash ROM

183

C.13.2 Flash Memory Addresses

184

C.13.4 Flash ROM Memory Map

185

Physical Address

186

Information

187

Digital equipment corporation AlphaPC64 Bedienungsanleitung (70 Seiten)

Marke: Digital-equipment-corporation | Kategorie: Motherboards | Größe: 0.19 MB |

Englisch

Inhaltsverzeichnis

Alpha PCI 64–275

1

User’s Manual

1

Contents

3

4 Functional Elements

4

B Additional Documentation

4

C Technical Support

4

About This Manual

7

Document Conventions

8

Alpha PCI 64–275 Introduction

9

21072 Chipset

10

LJ04134A.AI

11

1.2.3 PAL Control Set

12

1.2.6 PCI Interface Overview

13

1.2.7 ISA Interface Overview

13

1.2.8 Software Support

14

1.2.9 Component Layout

14

1.2.10 Board Summary

14

LJ-04458.sgw

15

Scale = 90%

15

Minimum DRAM required:

16

16MB for Microsoft Windows NT

16

32MB for Digital UNIX

16

Board Jumpers and Connectors

19

2.1 Conﬁguration Jumpers

20

LJ-04457.AI5

26

3.1 Hardware Requirements

33

3.2 Software Requirements

34

3.3 Hardware Conﬁguration

34

3.4 Software Conﬁguration

37

AlphaPC64>

38

Functional Elements

41

4–2 Functional Elements

42

4.2 ISA Devices

45

4.3 dc Power Distribution

45

4.4 Flash ROM (System ROM)

46

4.4.2 Flash ROM Structure

49

Found in image header

50

4.4.3 Flash ROM Access

51

5.1 Power Requirements

53

5.3 Physical Board Parameters

54

Additional Documentation

63

B–2 Additional Documentation

64

Technical Support

65

Digital equipment corporation AlphaPC64 Bedienungsanleitung (18 Seiten)

Marke: Digital-equipment-corporation | Kategorie: Motherboards | Größe: 0.05 MB |

Englisch

Inhaltsverzeichnis

Alpha PCI 64–275

1

Read Me First

1

MSWIN32 forum (GO MSWIN32)

5

LJ04284A.AI

7

4.2 Board Jumpers

8

LJ-04459.AI5

9

Scale = 90%

9

LJ-04132.SW

10

AlphaPC64>

16

5 Technical Support

18

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